The panel agrees that Intel's High-NA EUV technology is technically viable, but there's no consensus on its commercial viability. The key debate centers around the timing and willingness of external customers to commit and pay premiums at scale, given the significant capex required.
Risk: Delayed or insufficient external customer commitments, leading to prolonged losses for Intel's foundry unit.
Opportunity: Potential strategic necessity from hyperscalers seeking non-TSMC capacity, driven by geopolitical factors.
This analysis is generated by the StockScreener pipeline — four leading LLMs (Claude, GPT, Gemini, Grok) receive identical prompts with built-in anti-hallucination guards. Read methodology →
Intel Corporation (NASDAQ:INTC) and ASML Holding N.V. (NASDAQ: ASML) have recently provided fresh evidence that High-NA EUV lithography is advancing in commercial manufacturing. At the SPIE Photomask Technology + Extreme Ultraviolet Lithography conference, the two companies announced several updates related to this technology and next-generation chip production.
While the update offers evidence of High-NA's manufacturing readiness, Intel faces a …
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Intel Corporation (NASDAQ:INTC) and ASML Holding N.V. (NASDAQ: ASML) have recently provided fresh evidence that High-NA EUV lithography is advancing in commercial manufacturing. At the SPIE Photomask Technology + Extreme Ultraviolet Lithography conference, the two companies announced several updates related to this technology and next-generation chip production.
While the update offers evidence of High-NA's manufacturing readiness, Intel faces a financial test about whether production improvements translate into better foundry returns. For ASML, it is whether greater manufacturing readiness ultimately leads to broader customer adoption and demand.
Production Credibility
According to the companies, more than one million wafers have now been processed using High-NA EUV across early tool certification and testing, research and development efforts, and volume production on select layers for a subset of Intel® Core™ Ultra Series 3 processors, code-named Panther Lake.
The products that have been manufactured on Intel 18A using High NA for select layers continue to deliver performance, the companies noted, meeting or exceeding comparable layers patterned using the NXE platform.
This offers Intel early production experience with the technology. Back in July, ASML noted how Intel was the first company to ship a high-volume logic product manufactured using ASML's High NA EUV lithography technology.
The two companies also noted building on years of collaboration to bring together lithography ecosystem around larger-format masks. This will support future High NA EUV scaling. Currently, ASML faces a limit on how big of a chip they can print because they use a smaller mask.
A Reuters report backs this claim, noting how ASML intends to work together with major customers to produce its most advanced tools for developing the kind of large data center chips designed by Nvidia and others.
ASML is planning to show a pilot line with the larger masks by 2031 and have the new technology ready for high volume production by 2033.
ASML's recent collaboration with Intel helps to validate its most advanced High-NA EUV machinery in active commercial production, supporting the case for broader industry adoption.
Bears have nevertheless argued that ASML's High NA-EUV machines would face sluggish demand due to costs and execution complexity, but the recent Intel milestone of processing one million wafers helps address concerns related to manufacturing readiness.
ASML in Focus Following the News
Samsung Electronics, Taiwan Semiconductor Manufacturing and Intel are moving forward with plans to use ASML's High-NA extreme ultraviolet lithography systems, prompting positive analyst commentary.
"The announcements are consistent with our High-NA adoption assumptions (5 tools this year, 6 next and 20 by 2030. While the announcements do not change our forecasts, they increase confidence that the ecosystem is aligning around a common High-NA roadmap. Intel's production experience demonstrates that customers can use the technology with existing mask formats today, while the TSMC-ASML-Samsung initiative establishes a longer-term path to capture the full productivity benefits of High-NA."
-Bank of America analyst Didier Scemama wrote in a note to clients.
Intel Still Has to Prove its Foundry Business
Intel's problem is well-known, it hasn't been able to turn Foundry into a profitable business yet. Its Q2 2026 report revealed a revenue of $16.1 billion, a 25% increase year-over-year.
Particularly for its foundry business, revenue was $5.8 billion, a 31% increase year-over-year. This was coupled with an operating loss of $2.1 billion, compared with $3.2 billion a year earlier. While the operating loss did narrow down, only $293 million of quarterly foundry revenue came from external customers. As per Intel, the increase in external revenue was largely due to Altera becoming an external customer following deconsolidation.
The numbers show that processing more wafers does not yet demonstrate that external customers will shift meaningful production to Intel.
For ASML, the risk isn't High-NA adoption, but that widespread commercial use may take time. ASML's customer, TSMC, recently announced its plans to introduce High-NA into manufacturing from 2030. The decision implies how even though customers may be technically validating this technology, they are also taking their time for commercial adoption.
At the same time, TSMC's 2030 timeline also offers Intel a multi-year lead in gaining production experience with the world's most sophisticated lithography tools.
What the Hedge Fund Data Says
Smart money sentiment offers support for both Intel and ASML. 140 hedge funds held ASML at the end of the second quarter, up from 133 in the prior quarter. As for Intel, 138 hedge funds held the stock, up from 112 in the previous quarter.
Overall, the latest milestone from Intel-ASML strengthens the case that High-NA EUV is moving beyond experimentation into practical chip manufacturing. ASML investors will now wait to see how much of this quickly translates into broader demand, while the test for Intel lies in turning its manufacturing progress into meaningful external foundry business.
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AI Talk Show
Four leading AI models discuss this article
Opening Takes
“Near-term upside hinges on external foundry revenue translating from pilots to paid volume; manufacturing readiness alone does not ensure profits.”
Intel and ASML show High-NA is moving from lab to fab, with >1 million wafers processed and 18A-on-Intel Core Ultra Panther Lake layers. That’s a credibility milestone, and 2031-2033 mass adoption could unlock ROI if capacity and yields scale. But the article glosses over the economics: Intel foundry revenue external remains a sliver of total, and HNA capex per wafer is enormous; a multi-year ramp means longer payback and continued losses at Intel Foundry Services. Adoption may hinge on customer willingness to pay premium for larger masks, mask supply, and tool availability; macro demand and AI cycles are not guaranteed. The risk is delay or cost drag out beyond 2033.
Bull case against neutral: once HNA tooling matures, higher yields and performance advantages should justify premium pricing and faster external adoption, turning Intel Foundry into a material ROIC engine sooner than implied. However, the flip side is that adoption could lag if volumes stay internal or if cost drag persists.
“Technical validation of High-NA EUV does not equate to the commercial viability of Intel's foundry business, which currently lacks meaningful external customer adoption.”
The Intel-ASML milestone is a technical triumph but a commercial non-event. While processing one million wafers proves High-NA EUV is viable, it doesn't solve Intel's core issue: the 'Foundry' unit remains a massive cash incinerator with only $293 million in external revenue. Intel is effectively subsidizing its own R&D under the guise of foundry growth. For ASML, the 2030 timeline from TSMC suggests that High-NA will be a slow-burn capital expenditure cycle rather than a sudden revenue spike. Investors are confusing technical readiness with economic scalability. Until external foundry customers actually commit to Intel 18A, this is just expensive engineering, not a profitable business model.
Intel's 'multi-year lead' in High-NA could create a massive moat if they successfully stabilize yields, potentially forcing TSMC to play catch-up when the industry hits the next scaling wall.
“Intel's High-NA production milestone is a technical achievement that masks a commercial problem: 95% of foundry revenue is still captive, and external customers won't commit capex at scale until yields and cost-per-wafer prove superior to existing nodes—a 2-3 year away.”
The article conflates production readiness with commercial viability—a critical distinction. Yes, Intel shipped 1M wafers on High-NA for Panther Lake select layers, but that's internal validation on a single product line, not proof of external customer traction. The foundry unit's $293M external revenue on $5.8B total revenue (5% external mix) is damning: Intel is essentially running a captive fab. ASML's 2031 pilot/2033 volume timeline for larger masks means current tools are already capacity-constrained for the data center chips that would justify the $300M+ per tool capex. TSMC's 2030 adoption date suggests even technical validation doesn't translate to urgent capex cycles.
Intel's 25% foundry revenue growth YoY and narrowing losses ($2.1B vs $3.2B) could signal genuine path to profitability if external customer wins materialize; ASML's hedge fund accumulation (140 funds, +7 QoQ) suggests informed money sees adoption risk as priced in.
“Intel's foundry external revenue of only $293M shows High-NA progress has not yet produced meaningful customer adoption.”
Intel's milestone of one million High-NA wafers processed and early Panther Lake output validates manufacturing readiness, yet its foundry segment still posted a $2.1B operating loss in Q2 with just $293M from external customers. This gap between technical progress and commercial traction suggests the economics may lag for years. ASML gains short-term validation but faces delayed volume ramps as TSMC waits until 2030. Hedge fund ownership increases do not offset the multi-year timeline mismatch between tool shipments and profitable foundry revenue. Intel's lead could prove costly if external design wins fail to scale.
Intel's production experience could accelerate external wins by 2027-28 if Panther Lake yields drive design-ins from hyperscalers seeking U.S. capacity ahead of TSMC.
The Debate
Responding to Gemini
“External traction is the real profitability hinge; without multi-quarter customer wins and scalable capex adoption by 2030–31, High-NA remains a subsidy, not a ROIC engine.”
Gemini’s ‘commercial non-event’ read understates the hinge: external foundry revenue is the soil where profitability grows or withers. One million High-NA wafers prove capability; they don’t prove customers will commit or pay premiums at scale. The real risk is timing and economics of customer ramp, given capex per wafer and tool demand. If external wins lag 2–3 years beyond 2030–31, the business becomes a prolonged subsidy, not a ROIC engine.
Responding to Claude
“Intel's foundry unit is transitioning from a commercial business to a strategic, sovereign asset, which changes the risk-reward calculus for hyperscaler adoption.”
Claude, you highlight the 5% external revenue mix, but you're missing the geopolitical tailwind. Hyperscalers like Microsoft and Amazon are desperate for non-TSMC capacity to de-risk their supply chains. If Intel’s 18A yields hold, external revenue isn't just about 'customer commitment'—it's about state-backed, strategic necessity. The 'captive fab' narrative ignores that Intel is essentially building a sovereign foundry asset. The real risk isn't lack of demand; it's whether Intel can survive the cash burn long enough to reach that 2027 inflection point.
Responding to Gemini
“Strategic demand ≠ profitable demand; Intel needs external customers to absorb capex at competitive yields, not just fill capacity.”
Gemini's geopolitical angle is real, but it conflates strategic necessity with willingness to pay premium pricing at scale. Hyperscalers want non-TSMC capacity—true—but they'll negotiate hard on cost and yield risk. Intel's 18A must hit 80%+ yields consistently to justify capex per wafer vs. TSMC 3nm economics. State backing doesn't eliminate the unit economics problem; it just extends the runway. The 2027 inflection hinges on external design wins, not geopolitical tailwinds alone.
Responding to Gemini
“ASML’s delayed High-NA ramp caps any 2027 external revenue surge regardless of geopolitical pressure.”
Gemini’s 2027 inflection via hyperscaler de-risking overlooks ASML’s own 2030-2033 volume timeline for High-NA masks and tools. Even sovereign demand won’t accelerate tool shipments or mask infrastructure; Intel Foundry’s $2.1B quarterly losses will likely stretch if external 18A commits remain contingent on yields that TSMC itself is not rushing to validate until later.
Panel Verdict
NEUTRAL No ConsensusThe panel agrees that Intel's High-NA EUV technology is technically viable, but there's no consensus on its commercial viability. The key debate centers around the timing and willingness of external customers to commit and pay premiums at scale, given the significant capex required.
Potential strategic necessity from hyperscalers seeking non-TSMC capacity, driven by geopolitical factors.
Delayed or insufficient external customer commitments, leading to prolonged losses for Intel's foundry unit.
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